At present, as a semiconductor device capable of suppressing the generation of a parasitic capacitance, a semiconductor device with an SOI substrate has been used. The SOI substrate is a substrate in which a BOX (Buried Oxide) film is formed on a support substrate made of Si (silicon) having a high resistance or the like and a thin layer (silicon layer) mainly made of Si (silicon) is formed on the BOX film. In the case when a MOSFET (Metal Oxide Semiconductor Field Effect Transistor: MOS-type field effect transistor) is formed on the SOI substrate, it is possible to reduce a parasitic capacitance generated in a diffusion region formed in the silicon layer. For this reason, by producing a semiconductor device using the SOI substrate, for example, the integration density and operation speed of the semiconductor device can be improved, and the prevention of latch-up can be expected.
Japanese Patent Application Laid-Open Publication No. 2009-076549 (Patent Document 1) describes a structure in which a transistor is formed on each of an SOI layer and a bulk layer on a single semiconductor layer.
International Patent Application Publication WO 2007/004535 Pamphlet (Patent Document 2) describes a structure in which an SOI-type MISFET (Metal Insulator Semiconductor FET) and a bulk-type MISFET are formed on a semiconductor substrate.
Japanese Patent Application Laid-Open Publication No. 2007-311607 (Patent Document 3) describes a structure in which an SOI region and a bulk silicon region are formed in the same substrate, and a MISFET is formed in each of the SOI region and the bulk silicon region.
Japanese Patent Application Laid-Open Publication No. 2006-135340 (Patent Document 4) describes a method in which an n channel type MOSFET and a p channel type MOSFET are formed in a bulk silicon region, and a silicon layer is epitaxially grown in the source and drain regions of one of the MOSFETs by using an insulating film.